Algo-Logic Systems' 40G TCP Endpoint implements a full TCP functionality in FPGA hardware that is capable of opening, maintaining, and closing TCP Connections. It has a receive-side ultra-low-latency of 96.0-nanoseconds.

Their network-tested TCP Endpoint delivers ultra-high performance and highest TCP bandwidth. It supports full duplex rates of 80 Gbps scalable to hundreds of Gigabits/second by using multiple ports within a single FPGA. Each port runs at the full 40G line rate.

The implementation is portable between Altera and Xilinx FPGA devices and compatible with all widely deployed FPGA platforms including REFLEX XpressGX5-LP, Bittware S5-PCIe-HQ, Altera 100G Stratix V GX, and other platforms.

For datacenter acceleration, the 40G TCP Endpoint can be used for North-South data transfers inside racks from 40G/100G Top-of-Rack Switches. For datacenters configured with 40G East-West traffic pipes, the 40G TCP Endpoint will most efficiently transfer packets at full line-rate substantially increasing utilization while reducing Total Cost-of-Ownership (TCO).

Product brief