Algo-Logic and Bittware Announce Joint Company Collaboration on 40G TCP Endpoint on S5-PCIe-HQ FPGA Board

Algo-Logic Systems, a recognized leader in providing hardware-accelerated, deterministic, ultra-low-latency products, systems and solutions for accelerated finance, datacenter acceleration, and embedded system industries, announced availability of their new 5th Generation 40G TCP Endpoint running on Bittware’s S5-PCIe-HQ platform today. The IP-Core enables FPGA-implemented logic to directly communicate over 40 Gigabit Ethernet networks with remote hardware or software devices and includes easy to use hardware application programming interface that supports multiple real-world accelerated datacenter use cases.

Their network-tested 40G TCP Endpoint delivers ultra-low-latency of 96.0 nanoseconds at full duplex rates of 80 Gbps. This 40G TCP Endpoint IP-Core solution runs on the Altera Stratix V FPGA on BittWare’s S5-PCIe-HQ full height, half-length platform with dual QSFP+ ports. Designed for high-end applications, the Stratix V provides a high level of system integration and flexibility for I/O, routing, and processing. Over 16 GBytes of on-board memory includes DDR3 and QDRII/II+. Two front-panel QSFP+ cages allow two 40GigE interfaces (or eight 10GigE) direct to the FPGA for reduced latency, making the board ideal for high frequency trading and networking applications. The S5PH-Q also features a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform management. All of these features combine to make the S5PH-Q a versatile and efficient solution for creating and deploying high-performance FPGA computing systems for Network Packet Processing and High Performance Computing applications in financial services, MAG (military, aerospace, and government), and instrumentation.

Read the full press release.