Algo-Logic’s algorithmic lookup engines augment or replace inflexible Application Specific Integrated Circuits (ASICs), network processors, and/or high-latency software. They leverage the capability and flexibility of modern FPGAs to accelerate network packet processing. Algo-Logic processes IPv4 and IPv6 packets at 100 Gigabits/Second.
- Configurable cores support multiple tables, varied key-sizes, and differing entries per table.
- Supports incremental updates.
- Capability to enhance features in the cores.
- Drop-in replacement for a CAM solution.
- Ability to customize a solution by combining our different soft cores into a single device.
- Minimal development time.
- Integrates with other standard System on Chip (SoC) designs.
Key-Value Search leverages GDN® on FPGAs to perform lookups with the lowest latency (less than 1 microsecond), highest throughput, and least processing energy.
GDN Traffic Classifier forwards packets and load balances traffic across numerous hosts to provision Cloud Services in rack-scale networks; Top-of-Rack (TOR) evenly distributes network traffic.
Our 100G GDN Top of Rack (TOR) load balancer switch routes packet traffic to compute and storage servers in the mobile rack as well as load balances the north-south rack network servers.