Algo-Logic Systems' pre-built Low Latency Library consists of infrastructure components and protocol parsers that enable processing orders with the lowest theoretical latency possible. The library is developed as a set of modular components that can be integrated together to implement a complete Algorithmic Trading Solution with the shortest possible time to market.
Infrastructure components in the library form the base of Algo-Logic’s low latency finance solutions. It consists of functions such as Internet Protocol (IP) decoding, TCP session processing, UDP datagram processing, and a register interface that allows the hardware to be easily controlled from a software API. Infrastructure components for standard FPGA platforms (like the DE5Net) allow the gateware to operate on orders at full 10 Gbps line rate.
The Financial Protocol Parser supports all major text and binary financial protocols including FIX, OUCH for NASDAQ, XPRS for DirectEdge, BOE for BATS BZX, ArcaDirect for NYSE ARCA, Arrowhead for TSE, CME MDP3 for SBE, and Native Trading Gateway for LSE. The protocol parsers combined with business logic can extract and process data in under 0.2 µS.
- FPGA gateware provides lower latency processing than can be achieved in software.
- Order data can be extracted and processed in under 0.2 µS.
- Hardware provides deterministic, jitter-free processing of messages.
- By using Algo-Logic’s low latency library, products can be completed with short development time.
- The parsing libraries already support all major stock exchange order entry and market data protocols.
- The FPGA hardware enables highly flexible and customizable trading solutions.
Pre-built financial protocol parsers such as BOE (BATS BZX), CME MDP3 (SBE), ArcaDirect (NYSE Arca), Arrowhead (TSE), Native Trading Gateway (LSE), OUCH (ASX, NASDAQ OMX Nordic), and FIX (Financial Information eXchange) cover multiple order entry and market data protocols for different exchanges across the globe.