Traders who want optimal order execution need to track the best bid and ask prices with the lowest latency and jitter. Algo-Logic System's Full Order Book provides this functionality with a maximum processing latency of less than 230 nanoseconds on a single FPGA Platform. This gateware approach is 100x to 1,000x faster than than most software alternatives.

Full Order Book includes:

  • Maintaining L-3 order-level book.
  • Updating L-2 book with a default of 10 price levels.
  • Reporting the top-of-book with the best bid/ask information.
  • Displaying of the last trade.

Tracking deep L-3 book with ultra-high performance is achieved implementing the entire algorithm in logic inside a single FPGA. The depth of the constructed L-2 book is user-configurable via the application programming interface. Unlike multi-FPGA or CPU-based competitor architectures, Algo-Logic’s single-FPGA platform architecture achieves deterministic, ultra low latency without jitter regardless of the number of tracked symbols at the line rate of 10 Gbps.

The low latency Order Book uses on-chip memory for book sizes that have thousands of open orders, a dozen symbols, and reporting of ten L-2 levels. For use-cases where millions of open orders, thousands of symbols, and unlimited levels need to be tracked, the scalable Order Book is still implemented with a single FPGA but stores data in off-chip DDR3 memory.

The Full Order Book can be seamlessly integrated with all existing components of Algo-Logic Systems' Low Latency Library, including pre-built protocol parsing libraries and TCP Endpoint to deploy complete Tick-To-Trade applications within a single FPGA platform.

Product brief